NVIDIA has updated their GPU roadmap, ditching (or at least renaming) Volta and moving from Maxwell to the upcoming Pascal architecture.
Over the last few years NVIDIA’s roadmap has included a pair of architectures beyond Kepler: Volta and Maxwell. While Maxwell is currently rolling out and provides evolutionary steps over Kepler, Pascal will be a whole new technological leap forward with enhanced memory designs, embedded DRAM and even a new connection interface.
Named after the French mathematician Blaise Pascal, NVIDIA’s upcoming architecture will include a number of new technologies. 3D Memory has been talked about for a while now and it will be instrumental within Pascal. By staking DRM chips together, providing them with a massive interface and embedding the ICs directly onto the GPU package, NVIDIA claims they will be able to provide several times greater bandwidth, more than twice the memory capacity and quadruple energy efficiency. The space-saving efficiency of this design also means board size will be drastically reduced.
NVIDIA is also taking the plunge into unified memory whereupon the CPU and GPU will have co-existing memory links so they can use each other’s resource pool. This should be quite beneficial for load balancing under DX12 environments.
Likely one of the more talked-about additions to Pascal is what NVIDIA calls NVLink. From what we understand, this is a proprietary interface which augments (but does NOT replace) PCI-E as the primary communication bus between a CPU and the graphics processor. In NVIDIA’s own words:
The basic building block for NVLink is a high-speed, 8-lane, differential, dual simplex bidirectional link. Our Pascal GPUs will support a number of these links, providing configuration flexibility. The links can be ganged together to form a single GPU↔CPU connection or used individually to create a network of GPU↔CPU and GPU↔GPU connections allowing for fast, efficient data sharing between the compute elements. When connected to a CPU that does not support NVLink, the interconnect can be wholly devoted to peer GPU-to-GPU connections enabling previously unavailable opportunities for GPU clustering.
Moving data takes energy, which is why we are focusing on making NVLink a very energy efficient interconnect. NVLink is more than twice as efficient as a PCIe 3.0 connection, balancing connectivity and energy efficiency.
Understanding the value of the current ecosystem, in an NVLink-enabled system, CPU-initiated transactions such as control and configuration are still directed over a PCIe connection, while any GPU-initiated transactions use NVLink. This allows us to preserve the PCIe programming model while presenting a huge upside in connection bandwidth.
NVLink is obviously meant to target the developer and HPC crowd, who have begun worrying out loud about the potential limitation of PCI-E in relation to in-system high speed communication latency. In addition, it requires support be built into the CPU architecture and to our knowledge, Intel hasn’t announced compatibility or even support for this standard…yet. With this in mind, NVLink will likely won’t have an large impact on the desktop market for the time being (past its far-reaching implications for communications in multi card setups) but it could certainly make Pascal a key component in compute and rendering scenarios. NVIDIA calls this “feeding the appetite for big data” but it can also be considered the next logical step for SLI.
As its 2016 release comes closer, we will likely hear a lot more about Pascal and its core architecture but for the time being, NVIDIA has shown us a quick glimpse into what to expect from them in the coming years.