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AMD Radeon HD 7870 & HD 7850 Review

Author: SKYMTL
Date: March 3, 2012
Product Name: Radeon HD 7870 & HD 7850
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AMD’s Pitcairn Core Under the Microscope



Upon first glance the 2.8 billion transistor Pitcairn core bears a striking resemblance to that of the higher end Tahiti and you’d be forgiven if you thought that it is nothing more than a HD 7950 with a few bits and pieces disabled. Naturally, that isn’t the case since Pitcairn has been built from the ground up to be an efficient money maker for AMD and as such, a brand new design was needed. In its fully enabled form it makes use of 20 Compute Units containing 64 Stream Processors and four texture units for a total of 1280 cores and 80 TMUs. These are then broken into two distinct processing engines, each of which holds 10 CUs .

Aside from the primary processing stages, the render output pipeline mirrors AMD’s higher end cores with eight combined Render Output Units containing 32 ROPs. The real differentiating factor between Pitcairn and previous generations of mid level cards lies within its memory controller layout. Instead of using a simple 128-bit or 256-bit bus paired up with 1GB of memory, this architecture is designed to be used in parallel with 2GB of GDDR5, giving it plenty of bandwidth. We’re guessing that 1GB versions will likely be used to plug the hole between the HD 7870 and HD 7850 at some later date.

Speaking of the HD 7850, it uses the Pitcairn Pro core which essentially mirrors its higher end sibling but comes with a quartet of Compute Units disabled. The result is a still respectable 1024 cores and 64 texture units but otherwise, the memory, ROP and cache hierarchy is identical to a fully enabled part.


There doesn't seem to be much different between the geometry processing engines in the current and next generation architectures but there are several optimizations built into Pitcairn for increased efficiency and throughput.

Let’s start with the obvious first. Much like Cayman and unlike the lower end Cape Verde, Pitcairn uses two distinct geometry and primary processing engines that are accessed through a common Command Processor which takes care of load balancing and scheduling. This is a major distinguishing factor between this architecture and Barts since the outgoing HD 6800 series only had a single graphics engine that allowed it to only process one primitive per clock. Pitcairn on the other hand can attack higher levels of geometry with two engines working in parallel.

The fixed function stages are broken up into the two engines that work in parallel and contain what AMD calls their “ninth generation” tessellators. Alongside other small changes, these new tessellation units still feature off-chip buffering which allows geometry data from tessellated workloads to be stored in the DRAM if the on-chip cache becomes saturated.


Largely due to the addition L2 cache (in this case 512KB) and other improvements in the tessellation engine, there is a vast improvement over the HD 6900-series at higher levels of tessellation. Many people may clue into the seemingly lackluster increase at lower levels but we have to remember that the previous architecture already brought a ton of potential to the table in exactly these situations. Once everything is taken into account, Pitcairn should offer more balanced performance in DX11 games that demand all levels of geometry processing and can in essence compete on an almost level footing with NVIDIA’s GTX 500-series.
 
 
 

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