Intel Westmere 32nm Launch & Clarkdale Core i5-661 CPU Review

Westmere Microarchitecture - Clarkdale Edition pt.2

Despite sharing significant roots with the original P6 microarchitecture that was debuted in the Pentium Pro in 1995, and being fundamentally derived from 'Penryn', the Nehalem microarchitecture represented one of the most significant overhauls ever. Intel's engineers added significant performance-oriented features, like an integrated memory controller, a superior system interconnect, a multi-level shared cache, all the while enhancing the chip's power efficiency capabilities.

With Lynnfield, Intel kept what made the current Bloomfield chips great, while removing the aspects that really only catered to the Server/Workstation segment, such as the triple-channel memory interface and the QuickPath Interconnect (QPI). They also worked extensively to improve the power efficiency of this new processor family, while significantly increasing performance in most consumer-oriented applications thanks to very aggressive Turbo Boost capabilities. Furthermore, by integrating the PCIe controller onto the processor itself, Intel were able to do away with the northbridge and create a 2-chip platform, which helprf reduce motherboard prices and overall power consumption.

So what have Intel added to these new Westmere-Clarkdale processors? Nothing, really. In fact, in order to get the new integrated graphics processor to perform as well as possible Intel have had to relocate some bits and pieces away from Clarkdale's CPU die, and they omitted some features from certain models due to product segmentation considerations. All of these changes are exclusive to these Clarkdale variants, and are unlikely to be found in other Westmere-based models.

• Integrated Memory Controller (IMC)

As discussed on the previous page, Intel have removed the integrated memory controller from the Clarkdale CPU die onto the Ironlake Graphics Memory Controller Hub (GMCH), ie: the die containing the integrated graphics processor (IGP). This might seem like a drastic change considering the fact that it's one of the most important features of the Nehalem microarchitecture but it was necessary in order to achieve optimal performance from the integrated graphics processor. The IGP doesn't have its own memory, thus it must use system memory. The latency penalty from having to access the system memory through the processor's memory controller would have caused a significant peformance hit. Obviously this design change is at the detriment to the CPU's memory access needs, but as we established in our original Bloomfield article, Nehalem-based chips aren't really bandwidth-limited in most consumer apps, even in single-channel mode. The CPU connects to the GMCH using the fast QPI interface so bandwidth should be less of a problem than latency.

• Integrated PCIe Controller

Lynnfield was the very first processor to have the PCI-Express controller integrated into the processor itself. On Clarkdale, as with the IMC, the integrated PCI-Express has been moved from from the CPU die to the Ironlake GMCH die. This obviously provides the IGP with a very low latency link to the PCI-Express bus. This integrated memory controller has 16 PCI-E 2.0 lanes and supports a single PCI-E x16 slot.

• SSE4.2 & AES-NI

Building upon Penryn's implementation of SSE4.1, which was focused on improving video encoding, image/video editing, faster 3D game physics, etc...the Nehalem architecture adds 7 new instrutions, namely Accelerated String and Text New Instructions (STTNI) and Application Targeted Acceleration (ATA), which focus on faster XML parsing, faster search and pattern matching, and other cryptic processor functions.

A brand new addition to the Westmere core are the Advanced Encrytion Standard New Instructions (AES-NI). There are 6 new instructions designed to accelerate tasks that use the AES algorithm, such as whole disk encryption/decryption, internet security, VoIP, etc. Baiscally, this essentially allows the processor to do real-time high-security encryption/decryption with little to no effect on system performance.

• Hyper-Threading

Although omitted from the lowly Pentium G6000 series, all Clarkdale Core i3 & i5 series chips support Hyper-Threading (HT). With HT enabled, a processor with two physical cores is viewed by the operating system as having four logical cores. A core usually processes the pieces of the different threads one after another, however an HT-enabled core can process two threads in a simultaneous manner. While Hyper-Threading did not perform particularly well on the Pentium 4, Nehalem's architecture was designed to remove many of the processing bottlenecks that had previously crippled feature. Depending on the workload, and how effectively multi-threaded an application is, the performance increases can be 20% or higher.

• Power Control Unit (PCU)

Nehalem’s Power Control Unit (PCU) is a very capable power management feature that uses an on-chip micro-controller to actively manage the power and performance of the entire processor with the help of numerous integrated power sensors. The PCU can dynamically alter the voltage and frequency of the CPU cores to lower power consumption or provide performance boost in conjunction with the Turbo Mode feature. Also, thanks to a development know as Power Gates, idle cores can be completely shut down and placed in a C6 sleep mode while other cores continue working. This is noteworthy because C6 mode had previously only been featured on mobile processors.

• Turbo Mode

Turbo Boost automatically overclocks the processor based on the workload demand, if there is enough thermal headroom left (ie: if your CPU if running cool enough). Lynnfield's aggressive Turbo Boost implementation was highly touted as one of its best features, but things have been scaled back a bit with Clarkdale. First and foremost, the Pentium G6000 series and Core i3 models do not feature Turbo Boost at all.

While Lynnfield models can Turbo Boost by up to 5 multipliers, the Core i5-600 series processors have only 2 additional speed bins, which is to say that they have two higher multipliers that they can use under certain scenarios. For example, if you are using a single or dual-threaded application, the PCU will down-clock or shut down one of the cores, thereby freeing up power and lowering heat output, allowing for an "overclock" on the one loaded core by two speed bins. If an application is triple or quad-threaded and the processor is not running too hot, the PCU will overclock all the loaded cores up by one speed bin. For those who are curious, the Clarkdale's IGP does not feature a Turbo Boost-like feature, but the mobile Arrandale platform does.