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Old August 4, 2007, 05:22 AM
BALISTX's Avatar
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Location: Ottawa, ON
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Well with the wedding over the build has commenced. I have made a change. I purchased the Athlon 64 3200 Venice with really good E6 stepping. I have gone ahead put the system together (Didn't get a change to take pics of the build in process). So I haven't OCed it yet and the reason for this is, is due a bad hard drive. When I went to format the drive it would not format, so I have to wait till Wednesday to buy a new hard drive. I'm getting the popular 320GB Seagate SATAII drive for $85 @ PC Cyber.

My first OC I'm going to strive for will be a moddest 2.5. I was surfing DIY and found a build very similar to mine (BIOS is a different version). I will try the settings I have found and see what I can do. Wish me luck

Here is example settings I plan on using

DIY-Street Forums - View Single Post - Socket 939 Overclocking Database

Genie BIOS Settings:

FSB Bus Frequency - 250
LDT/FSB Frequency Ration - 4
CPU/FSB Frequency Ratio - x 10.0
PCI eXpress Frequency - 100Mhz

CPU VID StartUp Value - 1.375

CPU VID Control - 1.375v
CPU VID Special Control - Avove VID * 110%
LDT Voltage Control - 1.20v
Chip Set Voltage Control - 1.60v
DRAM Voltage Control - 2.70v

DRAM Configuration Settings:

DRAM Frequency Set - 200 (DRAM/FSB:1/01)
Command Per Clock (CPC) - Enable
CAS Latency Control (Tcl) - 2.5
RAS# to CAS# delay (Trcd) - 04 Bus Clocks
Min RAS# active time (Tras) - 07 Bus Clocks
Row precharge time (Trp) - 03 Bus Clocks
Row Cycle time (Trc) - 07 Bus Clocks
Row refresh cyc time (Trfc) - 14 Bus Clocks
Row to Row delay (Trrd) - 03 Bus Clocks
Write recovery time (Twr) - 03 Bus Clocks
Write to Read delay (Twtr) - 02 Bus Clocks
Read to Write delay (Trwt) - 03 Bus Clocks
Refresh Period (Tref) - 3120 Cycles
Write CAS Latency (Twcl) - 01
DRAM Bank Interleave - Enabled

DQS Skew Control - Increase
DQS Skew Value - 0
DRAM Drive Strength - Level 5
DRAM Data Drive Strength - Level 1
Max Async Latency - 07.0 ns
DRAM Response Time - Fast *** May only be 5/10 BIOS ? ***
Read Preamble Time - 05.0 ns
IdleCycle Limit - 16 Cycles
Dynamic Counter - Disable
R/W Queue Bypass - 16 x
Bypass Max - 07 x
32 Byte Granularity - Disable(8 Bursts)


Last edited by BALISTX; August 4, 2007 at 05:25 AM.
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